(Hong Kong)
Product Summary
The XC4013XL-1BG256C is a member of XC4000X Series high-performance, high-capacity Field Programmable Gate Arrays (FPGAs). The XC4000 Series provide the benefits of custom CMOS VLSI, while avoiding the initial cost, long development cycle, and inherent risk of a conventional masked gate array. In addition, these FPGAs combine architectural versatility, on-chip Select-RAM memory with edge-triggered and dual-port modes, increased speed, abundant routing resources, and new, sophisticated software to achieve fully automated implementation of complex, high-density, high-performance designs.
Parametrics
Configuration switching characteristics: (1)Power-On Reset, TPOR: M0 = High: 10 ms min and 40 ms max; M0 = Low: 40 ms min and 130 ms max; (2)Program Latency, TPI: 30 min and 200 ms max per CLB column; (3)CCLK (output) Delay, TICCK: 40 ms min and 250 ms max; (4)CCLK (output) Period, slow, TCCLK: 540 ns min and 1600 ns max; (5)CCLK (output) Period, fast, TCCLK: 67 ns min and 200 ns max.
Features
Features: (1)Highest Performance: 3.3 V XC4000XL; (2)Highest Capacity Over 180,000 Usable Gates; (3)5 V tolerant I/Os on XC4000XL; (4)0.35 μm SRAM process for XC4000XL; (5)Additional Routing Over XC4000E: almost twice the routing capacity for high-density designs; (6)Buffered Interconnect for Maximum Speed Blocks; (7)Improved VersaRingTM I/O Interconnect for Better Fixed Pinout Flexibility; (8)12 mA Sink Current Per XC4000X Output; (9)Flexible New High-Speed Clock Network: Eight additional Early Buffers for shorter clock delays; Virtually unlimited number of clock signals; (10)Optional Multiplexer or 2-input Function Generator on Device Outputs; (11)Four Additional Address Bits in Master Parallel Configuration Mode; (12)XC4000XV Family offers the highest density with 0.25 μm 2.5 V technology.
Diagrams
<IMG src="http://www.seekic.com/uploadfile/ic-mfg/20113725642239.jpg" border=0>
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IC FPGA C-TEMP 3.3V 1SPD 256PBGA |
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Negotiable |
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XC4000 |
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XC4000A |
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XC4000E |
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XC4000H |
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XC4000X |
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XC4000XL |
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